https://www.youngju.dev/blog 천천히 올바르게. AI Researcher & DevOps Engineer Youngju's blog. GPU/CUDA, LLM, MLOps, Kubernetes AI workloads, and data engineering — plus mindset essays on confidence, routines, health, and sport psychology. ko fjvbn2003@gmail.com (Youngju Kim) fjvbn2003@gmail.com (Youngju Kim) Sun, 09 Aug 2026 00:00:00 GMT https://www.youngju.dev/blog/os-concepts/2026-08-09-instruction-latency-is-not-a-property-of-the-instruction.en https://www.youngju.dev/blog/os-concepts/2026-08-09-instruction-latency-is-not-a-property-of-the-instruction.en The Assembly Hall of Shame is a leaderboard for the competition to make a single instruction as slow as possible. At the bottom, nop takes 1 cycle; at the top, fxrstor64 takes 198 billion cycles, or 62 seconds. Read that leaderboard from the bottom up and it becomes a catalogue of every place a modern CPU can stall, divided into three bands: microcode assist paths, atomic operations that straddle a cache line, TLB invalidation, entropy exhaustion, and finally the PCIe fabric off the die. What the table really proves is that the notion of instruction latency is undefined without the surrounding state, and from that follow concrete conclusions about microbenchmarks and about real code. Sun, 09 Aug 2026 00:00:00 GMT fjvbn2003@gmail.com (Youngju Kim) os-conceptsperformancecpumicroarchitecturebenchmarkassembly https://www.youngju.dev/blog/os-concepts/2026-08-09-instruction-latency-is-not-a-property-of-the-instruction.ja https://www.youngju.dev/blog/os-concepts/2026-08-09-instruction-latency-is-not-a-property-of-the-instruction.ja Assembly Hall of Shameは、単一命令をもっとも遅くする競争の順位表です。最下位のnopが1サイクル、1位のfxrstor64が1,980億サイクルで62秒です。この順位表を下から上へ読むと、現代のCPUが止まりうるあらゆる地点の一覧になり、マイクロコード補助の経路、キャッシュラインをまたぐアトミック演算、TLBの無効化、エントロピーの枯渇、そしてダイの外のPCIeファブリックまで三つの区間に分かれます。この表が実際に証明するのは、命令遅延という概念が周囲の状態なしには定義されないという点であり、そこからマイクロベンチマークと実コードに対する具体的な結論が出てきます。 Sun, 09 Aug 2026 00:00:00 GMT fjvbn2003@gmail.com (Youngju Kim) os-conceptsperformancecpumicroarchitecturebenchmarkassembly https://www.youngju.dev/blog/os-concepts/2026-08-09-instruction-latency-is-not-a-property-of-the-instruction https://www.youngju.dev/blog/os-concepts/2026-08-09-instruction-latency-is-not-a-property-of-the-instruction Assembly Hall of Shame는 단일 명령어를 가장 느리게 만드는 경쟁의 순위표입니다. 최하위 nop이 1사이클, 1위 fxrstor64가 1,980억 사이클로 62초입니다. 이 순위표를 아래에서 위로 읽으면 현대 CPU가 멈출 수 있는 모든 지점의 목록이 되는데, 마이크로코드 보조 경로, 캐시 라인을 걸친 원자 연산, TLB 무효화, 엔트로피 고갈, 그리고 다이 밖 PCIe 패브릭까지 세 개의 구간으로 나뉩니다. 이 표가 실제로 증명하는 것은 명령어 지연이라는 개념이 주변 상태 없이는 정의되지 않는다는 점이며, 그로부터 마이크로벤치마크와 실제 코드에 대한 구체적인 결론이 나옵니다. Sun, 09 Aug 2026 00:00:00 GMT fjvbn2003@gmail.com (Youngju Kim) os-conceptsperformancecpumicroarchitecturebenchmarkassembly https://www.youngju.dev/blog/os-concepts/2026-08-09-instruction-latency-is-not-a-property-of-the-instruction.zh https://www.youngju.dev/blog/os-concepts/2026-08-09-instruction-latency-is-not-a-property-of-the-instruction.zh Assembly Hall of Shame 是一份「把单条指令跑到最慢」的比赛排行榜。垫底的 nop 是 1 个周期，第一名 fxrstor64 是 1,980 亿个周期，也就是 62 秒。把这份榜单从下往上读，它就成了现代 CPU 所有可能停顿之处的清单，并分成三个区段：微码辅助路径、跨缓存行的原子操作、TLB 失效、熵池枯竭，以及片外的 PCIe 总线。这张表真正证明的是，指令延迟这个概念离开周边状态就无法定义，而由此可以得出关于微基准测试与真实代码的具体结论。 Sun, 09 Aug 2026 00:00:00 GMT fjvbn2003@gmail.com (Youngju Kim) os-conceptsperformancecpumicroarchitecturebenchmarkassembly