
  <rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom">
    <channel>
      <title>Chaos and Order</title>
      <link>https://www.youngju.dev/blog</link>
      <description>천천히 올바르게. AI Researcher &amp; DevOps Engineer Youngju&#39;s tech blog. GPU/CUDA, LLM, MLOps, Kubernetes AI workloads, distributed training, and data engineering.</description>
      <language>ko</language>
      <managingEditor>fjvbn2003@gmail.com (Youngju Kim)</managingEditor>
      <webMaster>fjvbn2003@gmail.com (Youngju Kim)</webMaster>
      <lastBuildDate>Sat, 16 May 2026 00:00:00 GMT</lastBuildDate>
      <atom:link href="https://www.youngju.dev/tags/icestorm/feed.xml" rel="self" type="application/rss+xml"/>
      
  <item>
    <guid>https://www.youngju.dev/blog/culture/2026-05-16-open-fpga-risc-v-development-2026-yosys-nextpnr-icestorm-lattice-ecp5-sifive-beaglev-tang-nano-deep-dive.en</guid>
    <title>Open FPGA &amp; RISC-V Development 2026 Deep Dive - Yosys, NextPnR, IceStorm, Lattice ECP5, SiFive, BeagleV-Fire, Tang Nano, PULPino</title>
    <link>https://www.youngju.dev/blog/culture/2026-05-16-open-fpga-risc-v-development-2026-yosys-nextpnr-icestorm-lattice-ecp5-sifive-beaglev-tang-nano-deep-dive.en</link>
    <description>A 2026 landscape of open FPGA and RISC-V development. With Yosys + NextPnR + IceStorm / Project Trellis / Apicula you can synthesize and place-and-route iCE40, ECP5 and Gowin parts with a fully open toolchain. This guide covers Lattice, AMD/Xilinx, Intel/Altera, Microchip, GOWIN and EFINIX in 2026; open RISC-V cores (PULPino, Ariane, Rocket, BOOM, SiFive, VexRiscv, OpenTitan); RISC-V SBCs like VisionFive 2, Milk-V, BeagleV-Fire, HiFive Premier P550, Banana Pi BPI-F3 and LicheePi 4A; next-gen HDLs like Chisel 6, SpinalHDL, Amaranth, Veryl and CIRCT; Verilator 5, Cocotb, GTKWave and Surfer; SymbiYosys formal verification; OpenROAD + SkyWater 130nm + Tiny Tapeout.</description>
    <pubDate>Sat, 16 May 2026 00:00:00 GMT</pubDate>
    <author>fjvbn2003@gmail.com (Youngju Kim)</author>
    <category>english</category><category>fpga</category><category>risc-v</category><category>yosys</category><category>nextpnr</category><category>icestorm</category><category>lattice</category><category>sifive</category><category>beaglev</category><category>tang-nano</category><category>open-hardware</category><category>verilog</category><category>systemverilog</category><category>2026</category><category>deep-dive</category>
  </item>

  <item>
    <guid>https://www.youngju.dev/blog/culture/2026-05-16-open-fpga-risc-v-development-2026-yosys-nextpnr-icestorm-lattice-ecp5-sifive-beaglev-tang-nano-deep-dive.ja</guid>
    <title>オープン FPGA &amp; RISC-V 開発 2026 完全ガイド - Yosys・NextPnR・IceStorm・Lattice ECP5・SiFive・BeagleV-Fire・Tang Nano・PULPino 徹底解説</title>
    <link>https://www.youngju.dev/blog/culture/2026-05-16-open-fpga-risc-v-development-2026-yosys-nextpnr-icestorm-lattice-ecp5-sifive-beaglev-tang-nano-deep-dive.ja</link>
    <description>2026 年のオープン FPGA / RISC-V 開発の全体像。Yosys + NextPnR + IceStorm / Project Trellis / Apicula で iCE40・ECP5・Gowin を完全なオープンチェーンで合成・P&amp;R できる。Lattice・AMD・Intel・Microchip・GOWIN・EFINIX の 2026 年現状、オープン RISC-V コア(PULPino・Ariane・Rocket・BOOM・SiFive・VexRiscv・OpenTitan)、VisionFive 2 / Milk-V / BeagleV-Fire / HiFive Premier P550 / Banana Pi BPI-F3 / LicheePi 4A といった RISC-V SBC、Chisel 6・SpinalHDL・Amaranth・Veryl・CIRCT などの次世代 HDL、Verilator 5・Cocotb・GTKWave・Surfer、SymbiYosys 形式検証、OpenROAD + SkyWater 130nm + Tiny Tapeout まで一気に整理する。</description>
    <pubDate>Sat, 16 May 2026 00:00:00 GMT</pubDate>
    <author>fjvbn2003@gmail.com (Youngju Kim)</author>
    <category>日本語</category><category>fpga</category><category>risc-v</category><category>yosys</category><category>nextpnr</category><category>icestorm</category><category>lattice</category><category>sifive</category><category>beaglev</category><category>tang-nano</category><category>open-hardware</category><category>verilog</category><category>systemverilog</category><category>2026</category><category>deep-dive</category>
  </item>

  <item>
    <guid>https://www.youngju.dev/blog/culture/2026-05-16-open-fpga-risc-v-development-2026-yosys-nextpnr-icestorm-lattice-ecp5-sifive-beaglev-tang-nano-deep-dive</guid>
    <title>오픈 FPGA &amp; RISC-V 개발 2026 완벽 가이드 - Yosys · NextPnR · IceStorm · Lattice ECP5 · SiFive · BeagleV-Fire · Tang Nano · Pulpino 심층 분석</title>
    <link>https://www.youngju.dev/blog/culture/2026-05-16-open-fpga-risc-v-development-2026-yosys-nextpnr-icestorm-lattice-ecp5-sifive-beaglev-tang-nano-deep-dive</link>
    <description>2026년 오픈 FPGA / RISC-V 개발 지형도. Yosys + NextPnR + IceStorm/Project Trellis/Apicula로 iCE40·ECP5·Gowin을 완전한 오픈 툴체인으로 합성·P&amp;R 가능하다. Lattice·AMD·Intel·Microchip·GOWIN·EFINIX의 2026 현황, RISC-V 코어(PULPino·Ariane·Rocket·BOOM·SiFive·VexRiscv·OpenTitan), VisionFive 2 / Milk-V / BeagleV-Fire / HiFive Premier P550 / Banana Pi BPI-F3 / LicheePi 4A 같은 RISC-V SBC, Chisel 6 · SpinalHDL · Amaranth · Veryl · CIRCT 같은 차세대 HDL, Verilator 5 / Cocotb / GTKWave / Surfer, SymbiYosys 형식 검증, OpenROAD + SkyWater 130nm + Tiny Tapeout까지 한 번에 정리한다.</description>
    <pubDate>Sat, 16 May 2026 00:00:00 GMT</pubDate>
    <author>fjvbn2003@gmail.com (Youngju Kim)</author>
    <category>fpga</category><category>risc-v</category><category>yosys</category><category>nextpnr</category><category>icestorm</category><category>lattice</category><category>sifive</category><category>beaglev</category><category>tang-nano</category><category>open-hardware</category><category>verilog</category><category>systemverilog</category><category>2026</category><category>deep-dive</category>
  </item>

    </channel>
  </rss>
